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DOE Science, Technology and Policy Program– Office of Policy Fellowship Opportunity

https://www.zintellect.com/Opportunity/Details/DOE-STP-OP-2025-0001

About the Office of Policy

The Office of Policy (OP) supports the Secretary of Energy and the entire Department of Energy (DOE), providing analysis on domestic energy policy. Its work spans technology policy, infrastructure policy, state, local, tribal, and territorial policy, and energy jobs. It provides expertise in electricity systems, permitting, buildings and industry, mobility and fuels, energy security, supply chains, and the energy system. Working in coordination with the White House, Capitol Hill, other federal agencies, and local stakeholders, the Office of Policy aims to facilitate an affordable, reliable, and secure energy economy.

What will I be doing?

During your ORISE fellowship, you will receive guidance from a mentor and will learn about conducting research analysis within OP. You will engage with current OP staff on policy analysis projects and assignments

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Job ID: 260942

INESC TEC | Research Grant (AE2025-0323)
INESC TEC

Research Opportunities

Informatics, Electronics and Digital Systems, Digital Electronics, Microprocessors, Heterogeneous Systems

Work description

Literature review on WiFi localization, with special attention to the WiFi 6 standard, and on the design of reconfigurable smart surfaces (RIS) in the 5GHz band, as well as their respective integration and control methods. Design of a RIS with at least 16×16 elements, for operation at the 5GHz central frequency, considering support for at least two levels of control over the operational status of each RIS unit element. Validation through simulation and anechoic chamber testing of the RIS operation and functional characteristics (i.e., signal redirection and channel manipulation capabilities). Conceptualization and implementation of a RIS-based localization methodology, including a strategy for positioning the RIS (one

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Research Opportunities

Computer Science, Electronics and Digital Systems, Digital Electronics, Microprocessors, Heterogeneous Systems

Work description

The combination of RISC-V processors with dedicated accelerators is especially promising for edge computing; among these, CGRAs (Coarse Grained Reconfigurable Arrays) stand out for their efficiency and flexibility. However, their use is still limited by integration difficulties and poorly standardized programming models.

This grant explores the use of custom RISC-V instructions as a standardizable integration mechanism, allowing abstraction in the compilation process and transparency in the use of the CGRA by software. Specific objectives:

Adapt an existing state-of-the-art CGRA for integration with a RISC-V processor through custom instructions. Validate the functional integration between RISC-V core and CGRA using in-house co-simulation methods, and simulations of CGRA designs available in the state-of-the-art. Writing a co-authored scientific article to disseminate the results obtained.

Academic Qualifications

Bachelor’s degree or enrollment

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